As when heterobipolar transistors (HBT) are manufactured in a GaAs/AIGaAs material system, the epitaxial layers for forming the collector, the base, the emitter, the collector terminal and the emitter terminal are deposited over the whole surface. Only afterwards are these layers structured and modified or removed by various processes (e.g. implantations, re-etching steps).
The operation of the heterobipolar transistor is considerably influenced by the fashioning of the self-aligned emitter-base complex in the region of the highly-doped emitter-contact layers. These contact layers usually consist of a n.sup.+ -GaAs-layer and a graded n.sup.+ -In.sub.y Ga.sub.1-y As-layer.
If, during the manufacture of the heterobipolar transistor, the contact layers are not completely removed or insulated, an undesired parasitic emitter-base-sidewall diode results, which greatly reduces the power amplification in the HBT. The optimal conditions can only be established in a difficult manner in known manufacturing methods.
Usually, the emitter-contact layers are composed of a n.sup.+ -GaAs (doping level about 5.times.10.sup..about. cm.sup.-3) having a thickness in the range of 0.1 to 0.2 .mu.m and a graded n.sup.+ -In.sub.y Ga.sub.1-y As-layer (y greater than 0.5; doping level greater than 10.sup.19 cm.sup.3) having a thickness in the range of 0.03 to 0.1 .mu.m and grown on the n.sub.+ GaAs layer. In the self-aligned process, high-temperature stable tungsten silicide is used. Such a manufacturing process is described in the publication K. Ishii, T. Oshima, T. Fatatsugi, F. Fujii, N. Yokoyama, A. Shibatomi: "High-Temperature stable W.sub.5 Si.sub.3 /In.sub.0.53 Ga.sub.0.47 As Ohmic contacts to GaAs for self-aligned HBTs" in IEDM 86, 274-277 (1986). Corresponding to FIG. 8 of this publication, a W.sub.5 Si.sub.3 -film is applied on In.sub.0.53 Ga.sub.0.47 As-layers which are grown on epitaxial layers that are usual for heterobipolar transistors. This tungsten silicide film and the emitter contact layers located therebelow are etched in the form of the emitter, and beryllium ions were implanted for the fashioning of the base regions. The tungsten silicide film serves as an implantation mask. After the annealing of the implants the base electrodes are manufactured by means of conventional photolithography.
In many known heterobipolar transistor process variations the tungsten silicide, for example, is structured via reactive ion etching (CF.sub.4 or SF.sub.6) and InGaAs- and n.sup.+ -GaAs-contact layers are etched with appropriate dry-etching methods. Also, wet-chemical etchings are used for the reetching of the contact layers. Such a method is described in the publication R. J. Malik, L. M. Lundardi, R. W. Ryan, S. C. Schunk, M. D. Feuer: "Submicron Scaling of AlGaAs/GaAs self-aligned thin emitter heterojunction bipolar transistors (SATE-HBT) with current gain independent of emitter area" in Electronics Letters 25, 1175-1177 (1989). With regards to this method, an epitaxial layer sequence composed of a n-doped GaAs-layer, a n-doped AlGaAs-layer, a n-doped GaAs-layer, a low n-doped GaAs-layer, a p-doped AlGaAs-layer, a n-doped AlGaAs-layer, a n-doped GaAs-layer, and a n-doped GaInAs-layer is grown on a semi-insulating substrate composed of GaAs. Thereupon, a tungsten layer is deposited over the whole surface. On this tungsten layer an emitter composed of a Ti/Au/Ni-layer sequence is generated by means of a lift-off technique and subsequently, the tungsten layer is re-etched to the dimensions of this emitter by means of reactive ion etching. In a following step, wet-chemical etching is used to re-etch the cover layer composed of GaInAs, after which the GaAs-layer located therebelow is selectively re-etched by means of reactive ion etching. The emitter layer composed of AlGaAs is then exposed and provided with AuBe-contacts by means of a lift-off technique. Lateral re-etching of the layer sequence through to the n-doped AlGaAs-layer exposes it for the contacting of the collector; wet-chemical etching and selective reactive ion etching being used. With regards to these methods, the elimination of the leakage currents between the emitter and base is a significant problem, i.e. optimal elimination of the emitter-base-sidewall diode.